The invention relates to the field of electronics, and more specifically to circuits for frequency to current conversion.
Frequency-to-voltage and frequency-to-current converters are employed in numerous types of applications. One such application is the field of analog-to-digital conversion, in which power consumption by analog-digital processors is a persistent and increasingly complicated issue. Applications such as Analog-to-Digital converters (ADCs), require features such as an adaptive bias current, which enable analog-to-digital conversion while saving power consumption. Tools such as a frequency-to-current converter may be employed in such applications to supply an adaptive bias current.
Standard implementations of frequency-to-current converters, however, are inadequate to such tasks. Frequency-to-current converters are often implemented by coupling a frequency-to-voltage converter to a voltage-to-current converter. Many conventional frequency-to-voltage and voltage-to-current converters are well known in the art. This combination of circuits, however, is often inadequate for the purposes outlined above; in particular, such combinations are complicated to be embedded in a single integrated circuit, and demand too much power for host applications, such as an ADC converter.
As such, there is a need for a frequency-to-current converter which is simple in implementation, and which ensures that a linear relationship is maintained between output current and input clock frequency, for suitability in host applications.
The invention comprises a frequency-to-current converter operative to convert a clock frequency to an output current, such that the output current increases linearly with the clock frequency. The frequency-to-current converter is designed to minimize power consumption in hardware applications. Examples of hardware applications which may incorporate the converter of the present invention include digital-to-analog converters (DAC) or analog-to-digital converters (ADC). These applications may be driven by clocks with variable frequencies.
In embodiments of the invention, the frequency-to-current converter employs an integrator circuit, which is used to compare an input reference voltage and a current feedback into a sampling capacitor. At steady state, the feedback current is just sufficient to discharge the sampling capacitor to a fixed voltage. Thus, the current only depends on the clock frequency, the sampling capacitor value and the reference voltage. The current is linearly proportional to each of the factors listed above.
In many applications employing the frequency-to-current converter-such as, by way of non-limiting example, the analog-to-digital converterxe2x80x94the clock frequency driving the circuit is variable. In one version of the analog-to-digital converter, the clock frequency may vary from 7.5 MHz to 22 MHz. In embodiments of the invention, the variable clock frequency is accommodated by biasing the amplifiers in the frequency-to-current converter with currents proportional to the clock frequency, thereby ensuring that the unity-gain bandwidth of the amplifiers is adaptively adjusted to track the clock frequency, and saving power concurrently.
Circuits employed by embodiments of the invention are simple in design, particularly by comparison to standard frequency-to-current converters. In embodiments of the invention, the core of the frequency-to-current conversion circuit includes one opamp, two capacitors, one feedback transistor and a few switches. The elegant design facilitates lower cost, complexity, and power consumption in the host application, and allows the frequency-to-current converter to be resident with the host application on a single integrated circuit. These and other embodiments are described in further detail infra.